## M680X0 Run Time Support under MoniCa or RMS68K M680x0, Run Time Support Software exists to support RPC on the M68000/M68020 family, in a single task environment or an RMS68k multitask environment. The runtime library modules to be used will depend on the system. If the RPC library is already burnt into ROM, applications may be linked directly to the stubs and the rom entry point file. Application software may be in C, Pascal, FORTRAN or PILS, with stubs generated in styles GENERICC, CERNCROSS, FORTRAN or PILS. On the Valet&hyphen.Plus This is a standard test system for High Energy Physics built in VME equipment practice the RPC syetem and PILS are all available in ROM. The MoniCa (or RMON) debugger is used in two ways, either of which may be suppressed if MoniCa is not available. MoniCa symbols It is used to manage a symbol table used for translation, for which a dummy may be provided if MoniCa is not present. MIOS The MoniCa I/O system (MIOS) is used only for RS232 communication.

### Raw Ethernet Ethernet, on M68k Ethernet 2.0 may be used using the AMD "Lance" interface chip. (This is the chip used, for example on the LRT "Filtabyte" 25.1 board). The ethernet address format is described above (Sect 7.4).

### RS232 Serial Line An asynchronous V24, on M680x0 V24 For readers outside Europe, CCITT recomendation V24 is the European equivalent of the RS232&hyphen.C standard. (RS232&hyphen.C) line may be used for connecting two devices. The is V24. Under MoniCa there are two standard serial channels, MoniCa serial channels thus allowing for two possible basic values of :

TT1
  The primary V24 line ("Terminal")
TT2
  The auxiliary V24 line ("Hostline")

Inside the a set of options may be specified after the above mentioned serial channel specifications. The options currently supported are:

B
  Binary coding method: use all 8 bits of the communication path. This is the default.
L
  Printable ASCII coding method: use only the printable ASCII characters (seven bits).
F
  Disables the RTS/CTS protocol. By default, a strict handshake is used for flow control, the benefit of those systems with inadequate input buffering. If both connected systems have sufficient input buffering, the F option may be used to make the protocol to run faster.

Example:

TT2B.V24 8 bit operation over the auxilliary channel

### Under RMS68k The RPC run&hyphen.time system is shareable and reentrant. The following restrictions apply under RMS68k to the use of advanced RPC facilities.

- If a user error handle is declared, it will apply to all tasks, and so must be written to be shareable.
- The facilities for finding the name of the last caller (RPC_Caller_Address and the x@CALLER and x@CALLBACK format) CALLBACK addressing, under RMS68k CALLER addressing, under RMS68k cannot be used if there is more than one server task in the system

The following restrictions apply to any RMS68K tasks which use RPC. See the RMS68k manual for explanations of terms, and how to set up tables. ASQ under RMS68k

- The task must have an ASQ (Asynchronous Service Queue).
- Register stacking for ASRs must be enabled.
- If a default ASQ buffer is used, then it must be permanently enabled and of length at least 24 bytes.

Stub modules are NOT shareable, and so if two different tasks use the same client stub, each must be prelinked with a separate copy. As there is only one symbol table for all tasks, one may define a task&hyphen.wide symbol by prefixing it with the name of the task. For example define RMON_PHI1 0@AA0004003558_5050.ETHERNET

define TSK2_PHI1 0@AA0004003558_5062.ETHERNET specifies that the task RMON will access a PHI1 server AS SERVER 0 at address AA0004003558 using ethernet protocol type 5045, but that task TSK2 will access it using ethernet protcol type 5062.

### Debugging tools Trace information , on M680x0 The MoniCa symbol rpc_trace_flag controls diagnosic output. To turn it on, under Monica, this must be defined as "TRUE". If trace is on, the RPC run&hyphen.time system will produce copious trace information about each transaction, including the contents of each message received or transmitted, and the addresses involved. Under MoniCa (but not RMS68k), detailed diagnostics of the ethernet driver are controlled by the global (integer) flag _DEBUG. This may take values from 0 to 5, giving increasing amounts of trace information:

0 Trace only transmit errors, or internal hardware errors.

1 Trace also initialisation. (Still no output at interrupt level)

2 Trace all above plus error conditions at interrupt level

3 Trace all above plus normal Transmit interrupts

4 Trace all above plus normal Receive interrupts The flag is normally 0, or 1 if rpc_trace_flag is defined as TRUE. It may be set to other values by hand. The output is always sent to the local terminal, even if a remote terminal is running over RPC. If a fatal error, or an error when debug output is enabled, then a message may be output to the terminal with two bytes in hexadecimal.

            * LANCE: Transmit error, status = 43, error = 04

For a receive error, the status bits are as follows:

Bit 0
  ENP: Buffer includes the packet end.
Bit 1
  STP: Buffer includes the packet start. Both bits 0 and 1 indicate a whole packet, which is normal.
Bit 2
  BUFF: (Chained buffer access error. Should never occur, as chaining is not used.)
Bit 3
  CRC: CRC error on incoming packet
Bit 4
  OFLO: Overflow: The interface could not access memory fast enough to empty its FIFO buffer as the packet arrived.
Bit 5
  FRAM: CRC error and non&hyphen.integeral number of bytes in packet.
Bit 6
  ERR: An error has occured, at least one of FRAM, OFLO, CRC, BUFF is set.
Bit 7
  The buffer is in use bythe interface.

For a transmission error, the status bits are:

Bit 0
  ENP: Buffer includes the packet end.
Bit 1
  STP: Buffer includes the packet start. Both bits 0 and 1 indicate a whole packet, which is normal.
Bit 2
  DEFF: It was necessary to defer when trying to transmit.
Bit 3
  ONE: Exactly one retry was necessary to transmit the packet.
Bit 4
  MORE: More than one retry was necessary to transmit the packet.
Bit 5
  Always zero.
Bit 6
  An error (LCAR, UFLO or RTRY) condition occured.
Bit 7
  The buffer is in use by the interface.

The interesting bits in the acompanying transmit "error" field are:

Bit 2
  RTRY: 16 attempts were made to send the packet, all failing due to collisions on the ethernet. Note that apparent collisions can also be caused by a badly terminated cable, as well as by severe overload of the ethernet.
Bit 3
  LCAR: Loss of carrier during transmission.
Bit 4
  LCOL: Late collision. A collision has occured afterthe slot time of the channel has elapsed. No retry is performed in this case.
Bit 5
  RES: Always zero.
Bit 6
  UFLO: Underflow: data could not be read from memory fast enough to fill the packet.
Bit 7
  BUFF: Buffer chaining error. Should not occur.

### Development Tools Some utility programs which run under VAX/VMS have been developed to aid the development of remote microprocessor systems which include RPC software. These include facilities for interrogation of tasks and memory in the target task, starting and stopping of tasks, and file load and dump. These are described elsewhere.